A fab makes silicon, not a deployable edge system

Tesla and SpaceX announced an initial 16.8 billion dollar investment in a semiconductor complex called Terafab, in Grimes County, Texas, roughly an hour up the road from us. Part of the stated purpose is chips optimised for edge computing and inference, for hardware like Optimus and self driving Cybercabs.

I want to deal with one number first, because it is being repeated without a blink, and then get to the part that actually matters to anyone shipping edge AI today.

The 100 million square feet problem

The plan describes more than 100 million square feet of manufacturing space.

For scale: TSMC's largest individual gigafabs run in the low single digit millions of square feet of building floor space. Samsung's entire Pyeongtaek campus, built out over more than a decade across multiple fab buildings, sits on roughly 700 acres of land.

So a 100 million square foot figure is either the full multi phase build out across the reinvestment zone, which covers more than 22,000 acres, measured over many years, or it is not a building floor area at all. What it is definitely not is what 16.8 billion dollars buys.

The surrounding filings support that reading. County and school district tax abatement applications describe four separate phases with combined totals running well past a hundred billion dollars, against the 16.8 billion described as initial. The employment figures move too, depending on which document you read: 3,000 in the public announcement, a contractual minimum of 1,000 in the county agreement, and 1,654 permanent positions in one district application.

None of that makes the project fake or the ambition unserious. It makes it a plan, at the stage where a plan and a press release are the same artifact. Which is fine, as long as nobody quotes the aspirational number as a current fact.

The part that is genuinely significant

Strip away the scale reporting and something real is left.

Edge inference is now shaping semiconductor capital strategy. For most of the last decade, the money followed training. Enormous clusters, enormous power contracts, enormous headline parameter counts. Inference at the edge was where a model went to be quantised and quietly disappointed.

Now a meaningful share of announced capital is chasing silicon whose entire job is deciding something at the place where the physical world is happening. That is a real shift in where the industry thinks value accrues, and it is a shift we happen to agree with.

And now the caution

If you read that announcement as edge AI is solved now, I would push back, having spent a long time on the unglamorous side of it.

A fab produces silicon. It does not produce a deployable edge system.

The hard part was never getting one model to run once. That is a demo, and demos are easy. The hard part is sustaining many concurrent camera streams inside a fixed power envelope, in a sealed fanless enclosure, mounted in a warehouse in August.

Some specifics from our own platform, because generalities here are worthless.

DHI's production target is an NVIDIA Jetson Orin Nano with 8 GB of shared memory. Not 8 GB of GPU memory plus system memory: 8 GB total, shared between CPU and GPU, minus what the operating system takes. That single constraint dictates most of the architecture.

The biggest mistake we made early was assuming that more processes meant more isolation meant more safety, without noticing that each Python process costs roughly 250 MB purely from imports. Importing TensorRT, PyCUDA or Torch at module top level drags hundreds of megabytes of CUDA math libraries into every process that touches the module, whether or not it ever runs inference.

So the architecture became one shared inference service that owns the single TensorRT context for the whole host, with camera workers that never touch CUDA at all. The consequence is the number that actually matters operationally: adding a camera costs about 20 MB rather than about 260 MB. That difference is what makes six concurrent streams possible on the hardware instead of two.

There are more constraints where that came from. The Orin Nano has hardware video decode but no hardware encode, which quietly determines which streaming formats you can serve natively. Thermal headroom decides what you can sustain rather than what you can peak. And the question nobody asks in a benchmark is what the system is doing on hour nineteen, after memory has fragmented and something upstream has reconnected twice.

Tesla's own inference silicon today comes out of Samsung and TSMC under existing arrangements. Owning a fab would not have changed one of the constraints above.

Where this actually gets won

More capacity is good. Cheaper, more available, better targeted inference silicon makes everything we do easier, and I will take it.

But a wafer is an input. What a customer receives is a sealed box on a wall that has to work unattended, in heat, on someone else's network, for years, while watching more cameras than its spec sheet suggests it should.

Physical AI gets won by whoever is best at systems engineering under constraint, not by whoever has the most wafers. That was true when edge inference was unfashionable, and it will still be true when the fab is finished.